====== Apple IIc Plus Accelerator ======

The Apple IIc Plus accelerator is essentially a Zip Chip broken out into its discrete components, as Apple licensed the technology from Zip Technologies.  All of the registers function exactly like a 4 MHz Zip Chip.

===== Firmware =====

The firmware for maintaining the accelerator is in the aux bank of the firmware, at $FD00.  My disassembly and analysis can be found [[https://gist.github.com/mgcaret/022bd0bb3ee71f28429972523556416e|here.]]  The firmware as shipped by Apple contains numerous bugs, as annotated in the disassembly.  Replacement firmware can be found as part of [[projects:rom_4x_and_5x|ROM 5X]].

==== MIG RAM Use ====

The stock firmware uses [[mg_notes:apple_iic:mig_chip|MIG]] RAM page 2 as follows:

  * $00 - powerup byte 1 - $33 after init.
  * $01 - powerup byte 2 - $55 after init.
  * $02,$03 - current accelerator control word.
  * $04 - keyboard keypress at RESET time, used to detect <key>ESC</key> during reset.
  * $05-$08 - copies of what should be in Zip Chip $c05c-$c05f registers (respectively).
  * $10-$17 - used to  save zero page locations $00-$07.
  * Others - apparently unused.

==== Zero Page Use ====

When the accelerator firmware is called, either via reset or through the documented mechanism, it saves $00-$07 to the MIG RAM and then uses the locations.  When the code exits it is supposed to restore the locations, but due to a bug $00 is not restored properly.

  * $00 - temporary value
  * $01 - stack pointer at call time
  * $02 - command number
  * $03-$04 - user buffer pointer
  * $05 - exit code
  * $06-$07 - unused