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mg_notes:cpm:softcard_cpm_ref [2018/07/03 11:01] M.G. |
mg_notes:cpm:softcard_cpm_ref [2019/09/30 18:29] (current) M.G. [The Apple CP/M Disk Parameter Tables] |
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Adapted/fixed from [[http://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/os/cpm/Apple%20II%20Softcard%20CPM%20Reference.txt|here]]. | Adapted/fixed from [[http://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/os/cpm/Apple%20II%20Softcard%20CPM%20Reference.txt|here]]. | ||
- | I do not know who the original author is. My only claim is to have fixed some errors/typos and prettied it up for display here. | + | I do not know who the original author is. My only claim is to have fixed some errors/typos, expanded it, and prettied it up for display here. |
===== Peripheral Card Standard Locations ===== | ===== Peripheral Card Standard Locations ===== | ||
Line 73: | Line 73: | ||
Turn on your Apple II. | Turn on your Apple II. | ||
+ | ==== DIP Switches ==== | ||
+ | The four DIP switches are normally OFF for CP/M operation. Their functions are: | ||
+ | |||
+ | ^ Switch ^ Function when ON ^ | ||
+ | | 1-1 | Disable address translation. | | ||
+ | | 1-2 | Higher priority DMA devices cause SoftCard to relinguish bus. | | ||
+ | | 1-3 | Pass NMI line to Z80. | | ||
+ | | 1-4 | Pass IRQ line to Z80. | | ||
===== Apple Softcard CP/M specific programs ===== | ===== Apple Softcard CP/M specific programs ===== | ||
Line 182: | Line 190: | ||
^ Key ^ Action ^ | ^ Key ^ Action ^ | ||
- | | <key>Ctrl-S</key> | Temporarily stops character output to TTY: Output is resumed when any character is typed | | + | | <key>Ctrl-'S'</key> | Temporarily stops character output to TTY: Output is resumed when any character is typed | |
| <key>Ctrl-P</key> | Sends all character output to LPT: as well as to TTY: \\ This "printer echo" mode remains in effect until another <key>Ctrl-P</key> is typed. | | | <key>Ctrl-P</key> | Sends all character output to LPT: as well as to TTY: \\ This "printer echo" mode remains in effect until another <key>Ctrl-P</key> is typed. | | ||
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| 0E000H-0EFFFH | $C000-$CFFF | 6502 memory mapped I/O | | | 0E000H-0EFFFH | $C000-$CFFF | 6502 memory mapped I/O | | ||
| 0F000H-0FFFFH | $0000-$0FFF | 6502 zero page, stack, Apple screen, CP/M RWTS | | | 0F000H-0FFFFH | $0000-$0FFF | 6502 zero page, stack, Apple screen, CP/M RWTS | | ||
+ | |||
+ | This translation may be turned off by setting DIP switch S1-1 to ON. | ||
+ | |||
===== Apple II Softcard CP/M Memory Usage ===== | ===== Apple II Softcard CP/M Memory Usage ===== | ||
Line 404: | Line 415: | ||
|______________| |______________| | |______________| |______________| | ||
F200H | I/O cfg blk | $0200 | Keybd buff | | F200H | I/O cfg blk | $0200 | Keybd buff | | ||
- | | Device driver | |______________| | + | | Device drvr | |______________| |
F300H | Patch area | $0300 | Page 3 | | F300H | Patch area | $0300 | Page 3 | | ||
|______________| |______________| | |______________| |______________| | ||
Line 429: | Line 440: | ||
===== Interrupt handling ===== | ===== Interrupt handling ===== | ||
+ | |||
+ | Interrupts on the Z80 side are normally disabled. Setting DIP switches 1-3 and 1-4 | ||
+ | to the ON position passes the NMI and IQR lines, respectively, to the Z-80 | ||
Because of the way the 6502 is "put to sleep" by the Z-80 SoftCard using the | Because of the way the 6502 is "put to sleep" by the Z-80 SoftCard using the | ||
DMA line on the Apple bus, ALL interrupt processing must be handled by the | DMA line on the Apple bus, ALL interrupt processing must be handled by the | ||
- | 6502. AN interrupt can occur at two times: while in Z-80 mode and while in | + | 6502. An interrupt can occur at two times: while in Z-80 mode and while in |
6502 mode: | 6502 mode: | ||
Line 937: | Line 951: | ||
===== Microsoft SoftCard Version 2.23 BIOS ===== | ===== Microsoft SoftCard Version 2.23 BIOS ===== | ||
- | THe Microsoft 2.20B BIOS uses some ingainly fixes to correct a few | + | THe Microsoft 2.20B BIOS uses some ungainly fixes to correct a few |
problems, but still a few problems remain in the area of hardware | problems, but still a few problems remain in the area of hardware | ||
interfacing. Most of these problems are corrected in the SoftCard | interfacing. Most of these problems are corrected in the SoftCard | ||
Line 944: | Line 958: | ||
The hardware interfacing is greatly improved because version 2.23 | The hardware interfacing is greatly improved because version 2.23 | ||
uses Apple Computer's protocols for operating what Apple calls | uses Apple Computer's protocols for operating what Apple calls | ||
- | Formware Cards. Most of the cards that can operate a host of | + | Firmware Cards. Most of the cards that can operate a host of |
peripheral devices and have them do all sorts of neat tricks are | peripheral devices and have them do all sorts of neat tricks are | ||
Firmware Cards. Version 2.20B could not identify Firmware Cards and | Firmware Cards. Version 2.20B could not identify Firmware Cards and | ||
Line 1018: | Line 1032: | ||
| $DD0 | $DE0 | Firmware Card initialization routine, followed by a routine that uses the Apple protocol for firmware I/O | | | $DD0 | $DE0 | Firmware Card initialization routine, followed by a routine that uses the Apple protocol for firmware I/O | | ||
| $DE1 | $DEE | Firmware Card output routine | | | $DE1 | $DEE | Firmware Card output routine | | ||
- | | $DEF | $DFA | Formware Card routine which waits for card to accept I/O | | + | | $DEF | $DFA | Firmware Card routine which waits for card to accept I/O | |
| $E00 | $E02 | CP/M entry to the warm loader routine | | | $E00 | $E02 | CP/M entry to the warm loader routine | | ||
| $E03 | $E08 | Entry to CP/M RWTS routine on Language Card bank 1 | | | $E03 | $E08 | Entry to CP/M RWTS routine on Language Card bank 1 | | ||
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^ Offset ^ Contents ^ Use ^ | ^ Offset ^ Contents ^ Use ^ | ||
- | | 00H | SPT 16b | Total number of sectors per track | | + | | 00H | SPT 16b | Total number of 128-byte sectors per track | |
- | | 02H | BSH 8b | Data allocation block shift factor, determined by the data block allocation size | | + | | 02H | BSH 8b | Data allocation block shift factor, determined by the data block allocation size \\ 3 -> 1K, 4 -> 2K, 5 -> 4K, ... | |
- | | 03H | BLM 8b | Data allocation block mask (2[BSH-1]) | | + | | 03H | BLM 8b | Data allocation block mask (2[BSH-1]) \\ 7 -> 1K, 0FH -> 2K, 01FH -> 4K, ... | |
| 04H | EXM 8b | Extent mask, determined by data block allocation size and number of disk blocks | | | 04H | EXM 8b | Extent mask, determined by data block allocation size and number of disk blocks | | ||
- | | 05H | DSM 16b | Total storage capacity of disk drive | | + | | 05H | DSM 16b | Total storage capacity of disk drive, blocks minus one | |
| 07H | DRM 16b | Total number of directory entries minus one | | | 07H | DRM 16b | Total number of directory entries minus one | | ||
- | | 09H | AL0 8b | Determines reserved directory blocks | | + | | 09H | AL0 8b | Directory allocation bitmap, byte 0. | |
- | | 0AH | AL1 8b | Determines reserved directory blocks | | + | | 0AH | AL1 8b | Directory allocation bitmap, byte 1. | |
| 0BH | CKS 16b | Size of directory check vector | | | 0BH | CKS 16b | Size of directory check vector | | ||
| 0DH | OFF 16b | No of reserved tracks at beginning of logical disk | | | 0DH | OFF 16b | No of reserved tracks at beginning of logical disk | | ||
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bit of AL1, 15=lo bit of AL1. Bits are assigned starting at bit 0 up | bit of AL1, 15=lo bit of AL1. Bits are assigned starting at bit 0 up | ||
until bit 15. Suppose nbits is the number of bits set to 1: | until bit 15. Suppose nbits is the number of bits set to 1: | ||
+ | |||
+ | |||
^ BLS ^ Directory entries ^ | ^ BLS ^ Directory entries ^ | ||
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| 16384 | 512 * nbits | | | 16384 | 512 * nbits | | ||
- | Example: if DRM=127 (128 directory entries) and BLS=1024 bytes, there | + | Example: |
+ | |||
+ | ^ ^ AL0 ^^^^^^^^ AL1 ^^^^^^^^ | ||
+ | ^ Bit ^ 7 ^ 6 ^ 5 ^ 4 ^ 3 ^ 2 ^ 1 ^ 0 ^ 7 ^ 6 ^ 5 ^ 4 ^ 3 ^ 2 ^ 1 ^ 0 ^ | ||
+ | ^ Value | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | ||
+ | |||
+ | If DRM=127 (128 directory entries) and BLS=1024 bytes, there | ||
are 32 directory entries per block, requiring 4 reserved blocks. Thus | are 32 directory entries per block, requiring 4 reserved blocks. Thus | ||
the 4 hi bits if AL0 are set, and AL0=0FH, AL1=00H | the 4 hi bits if AL0 are set, and AL0=0FH, AL1=00H | ||
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^ Physical format: ^ A ^ B ^ C ^ D ^ | ^ Physical format: ^ A ^ B ^ C ^ D ^ | ||
- | ^ ^ Apple CP/M ^^ Enhanced ^ Standard ^ | + | ^ ^ Apple CP/M ^^ Enhanced CP/M ^ Standard \\ CP/M ^ |
- | ^ ^ 13-sect ^ 16-sect ^ 80-trk/16-sec/2-side ^ 8" SSSD ^ | + | ^ ^ 13-sect ^ 16-sect ^ 80-trk \\ 16-sec \\ 2-side ^ 8" SSSD ^ |
| Bytes/sector | 256 | 256 | 256 | 128 | | | Bytes/sector | 256 | 256 | 256 | 128 | | ||
| Sectors/track | 13 | 16 | 16 | 26 | | | Sectors/track | 13 | 16 | 16 | 26 | | ||
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**Apple CP/M DPB - Disk Parameter Block** | **Apple CP/M DPB - Disk Parameter Block** | ||
- | ^ ^ A ^ B ^ C ^ D ^ ^ | + | ^ ^ A ^ B ^ C ^ D ^ ^ |
+ | ^ ^ Apple CP/M ^^ Enhanced \\ CP/M ^ Standard \\ CP/M ^ ^ | ||
| SPT 16b | 26 | 32 | 32 | 26 | 128-byte Logical Sectors/Track | | | SPT 16b | 26 | 32 | 32 | 26 | 128-byte Logical Sectors/Track | | ||
| BSH 8b | 3 | 3 | 4 | 3 | Block shift factor | | | BSH 8b | 3 | 3 | 4 | 3 | Block shift factor | |