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mg_notes:65816_notes:addressing_modes [2019/06/24 14:16] M.G. ↷ Page moved from mg_notes:65816_notes:addressing_modes to mg_notes:65816_notes:addressing_modes |
mg_notes:65816_notes:addressing_modes [2019/06/24 19:26] M.G. |
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| ====== A Summary of 65816 Addressing Modes ====== | ====== A Summary of 65816 Addressing Modes ====== | ||
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| + | ===== Native Mode ===== | ||
| + | |||
| + | KK/K = PBR, BB/B = DBR. For indirect modes, the target address is the contents of the memory at the operand effective address. | ||
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| + | Instructions and their operands always wrap at the program bank boundary. | ||
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| + | Direct page addresses always wrap at the bank 0 boundary (in native mode). | ||
| + | |||
| + | Targets where the upper byte of the base address is the program bank register always wrap at the program bank boundary. | ||
| + | |||
| + | Targets where the upper byte of the base address is the data bank register never wrap. | ||
| + | |||
| + | ^ Simple Modes ^^^ | ||
| + | ^ Mode ^ Operand Size ^ Notes ^ | ||
| + | | Immediate | 1 or 2 | A reg operand size controlled by M bit, X/Y reg operand size controlled by X bit | | ||
| + | | Implied | 0 | | | ||
| + | | Accumulator | 0 | | | ||
| + | |||
| + | ^ Simple Branches and Jumps ^^^^ | ||
| + | ^ Mode ^ Operand Size ^ Base Address ^ Effective Address \\ wrap to KKxxxx ^ | ||
| + | | Absolute {JMP, JSR} | 2 | KK0000 | base+operand | | ||
| + | | Relative {8} | 1 | {PC} | PC+signed operand | | ||
| + | | Relative {16(BRL)} | 2 | {PC} | PC+signed operand | | ||
| + | |||
| + | ^ Simple and Basic Indexed Memory Access ^^^^ | ||
| + | ^ Mode ^ Operand Size ^ Base Address ^ Effective Address ^ | ||
| + | | Absolute {not JMP/JSR} | 2 | BB0000 | base+operand | | ||
| + | | Absolute,X or ,Y | 2 | BB0000 | base+operand+X or Y | | ||
| + | | Direct | 1 | 00DDDD | base+operand, wrap to 00xxxx | | ||
| + | | Direct,X or ,Y | 1 | 00DDDD | base+operand+X or Y, wrap to 00xxxx | | ||
| + | | Long | 3 | | operand | | ||
| + | | Long,X | 3 | | operand+X | | ||
| + | |||
| + | ^ Basic Stack Access ^^^^ | ||
| + | ^ Mode ^ Operand Size ^ Base Address ^ Effective Address \\ wrap to 00xxxx ^ | ||
| + | | Stack {push, pull} | 0 | | 00SSSS (before decrement/after increment) | | ||
| + | | Stack,S | 1 | 00SSSS | base+operand | | ||
| + | |||
| + | ^ Stack Indirect Access ^^^^^^^ | ||
| + | ^ Mode ^ Operand Size ^ Pointer Base Address ^ Pointer EA \\ wrap to 00xxxx ^ Pointer Size ^ Target Base ^ Target EA ^ | ||
| + | | (Stack,S) | 1 | 00SSSS | base+operand | 2 | BB0000 | base+pointer | | ||
| + | |||
| + | ^ Indirect Jumps ^^^^^^^ | ||
| + | ^ Mode ^ Operand Size ^ Pointer Base Address ^ Pointer EA ^ Pointer Size ^ Target Base ^ Target EA ^ | ||
| + | | (Absolute) {JMP} | 2 | KK0000 | base+operand | 2 | KK0000 | base+pointer, wrap to KKxxxx | | ||
| + | | (Absolute,X) {JMP, JSR} | 2 | KK0000 | base+operand+X | 2 | KK0000 | base+pointer, wrap to KKxxxx | | ||
| + | | [Absolute] {JML} | 2 | KK0000 | base+operand | 3 | | pointer | | ||
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| + | |||
| + | ^ Direct Page Indirect ^^^^^^^ | ||
| + | ^ Mode ^ Operand Size ^ Pointer Base Address ^ Pointer EA \\ wrap to 00xxxx ^ Pointer Size ^ Target Base ^ Target EA ^ | ||
| + | | (Direct) | 1 | 00DDDD | base+operand | 2 | BB0000 | base+pointer | | ||
| + | | (Direct,X) | 1 | 00DDDD | base+operand+X | 2 | BB0000 | base+pointer | | ||
| + | | (Direct),Y | 1 | 00DDDD | base+operand | 2 | BB0000 | base+pointer+Y | | ||
| + | | [Direct] | 1 | 00DDDD | base+operand | 3 | | pointer | | ||
| + | | [Direct],Y | 1 | 00DDDD | base+operand | 3 | | pointer+Y | | ||
| + | |||
| + | ^ Memory Move {MVN, MVP} ^^^ | ||
| + | ^ Mode ^ Operand Size ^ Notes ^ | ||
| + | | Src {II}, Dest {JJ} | 2 * 1 | Effective addresses for the move are II0000+X and JJ0000+Y, \\ wrapped at the bank boundary. | | ||
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