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mg_notes:apple_iic:iic_bugs [2017/11/08 18:38]
M.G. byte->nibble
mg_notes:apple_iic:iic_bugs [2017/11/10 03:46] (current)
M.G.
Line 37: Line 37:
           lda   ​addrh,​x ​      ; <-- SEE COMMENTS BELOW           lda   ​addrh,​x ​      ; <-- SEE COMMENTS BELOW
           and   #​$0f ​         ; only lower nibble valid           and   #​$0f ​         ; only lower nibble valid
-          beq   ​tsnoram ​      ; no RAM somehow! +          beq   ​tsnoram ​      ; no RAM somehow! ​[note: if bank 0, skips checking result of RAM test] 
-          bcs   ​tsloop ​       ; loop until we find a bank+          bcs   ​tsloop ​       ; loop until we find a bank [carry set = no RAM in bank]
           adc   #​1 ​           ; C = 0 from compare           adc   #​1 ​           ; C = 0 from compare
 tsnoram ​  ​sta ​  ​numbanks,​y tsnoram ​  ​sta ​  ​numbanks,​y
Line 50: Line 50:
 The problem is that when there is no memory expansion card installed, there is no register, and the value there is floating bus.  The only reason the code gets out of the loop is because the floating bus happens to usually have a bunch of bytes streaming by that have 0 in the low nibble. The problem is that when there is no memory expansion card installed, there is no register, and the value there is floating bus.  The only reason the code gets out of the loop is because the floating bus happens to usually have a bunch of bytes streaming by that have 0 in the low nibble.
  
-That being said, the current ​MAME does not float the bus for $C0C0-$C0CF.  ​This results in ROM $03 hanging when the card is first accessed, and, due to changes ​in in ROM $04, hang at boot for ROM $04.+That being said, MAME before ​ [[https://​github.com/​mamedev/​mame/​commit/​bdcb98307822e79c242782ee67bef966bf4c25de|bdcb983]] did not float the bus for $C0C0-$C0CF.  ​A non-floating bus results in ROM $03 hanging when the card is first accessed, and, due to changes ​made by Applehang at boot for ROM $04 (and presumably IIc Plus ROM $05).
  
-Another minor issue is that the code wouldn'​t find a theoretical Slinky that had only one 64K bank built into it, as the loop terminates when the bank hits 0.+Another minor issue is that the code wouldn'​t find a theoretical Slinky that had only one 64K bank built into it, as the loop terminates when the bank hits 0 (beq tsnoram) even if the carry flag is clear because RAM was found in bank 0.
  
 The code could be fixed by using the stack to save the counter and comes out a few bytes shorter: The code could be fixed by using the stack to save the counter and comes out a few bytes shorter:
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           sta   ​data,​x ​       ; restore data           sta   ​data,​x ​       ; restore data
           pla                 ; restore counter (net save 4 bytes)           pla                 ; restore counter (net save 4 bytes)
-          beq   ​tsnoram ​      ; no RAM somehow! ​(if we fixed to find lonely bank 0, returned size would be wrong)+          beq   ​tsnoram ​      ; no RAM somehow!
           bcs   ​tsloop ​       ; loop until we find a bank           bcs   ​tsloop ​       ; loop until we find a bank
           adc   #​1 ​           ; C = 0 from compare           adc   #​1 ​           ; C = 0 from compare
 +tsnoram ​  ​sta ​  ​numbanks,​y
 +          lsr   a
 +          sta   ​sizetemp ​     ; sizetemp = upper byte of block count
 +          rts
 +</​code>​
 +
 +We could use a couple of those bytes to fix the bank 0 issue:
 +
 +<​code>​
 +testsize ​ equ   *
 +          lda   #​0 ​           ; zero address reg l/m
 +          sta   ​addrl,​x
 +          sta   ​addrm,​x
 +          lda   #​$10 ​         ; start at 1 meg and go down
 +          sec
 +tsloop ​   sbc   #​1 ​           ; move down a bank
 +          sta   ​addrh,​x
 +          pha                 ; save counter, +1 byte code added
 +          lda   ​data,​x ​       ; save existing data
 +          pha
 +          dec   ​addrl,​x ​      ; fix address (undo auto-increment)
 +          lda   #​$a5 ​         ; common apple check byte
 +          sta   ​data,​x ​       ; store it
 +          dec   ​addrl,​x ​      ; fix...
 +          eor   ​data,​x ​       ; 0 if the data is there
 +          dec   ​addrl,​x ​      ; fix...
 +          cmp   #​1 ​           ; C = 0 if data okay
 +          pla
 +          sta   ​data,​x ​       ; restore data
 +          pla                 ; restore counter (net save 4 bytes)
 +          bcc   ​tsgotram ​     ; RAM found, extra branch net cost 2 bytes
 +          beq   ​tsnoram ​      ; still won't find lonely bank 0
 +          bne   ​tsloop ​       ; loop until we find a bank
 +tsgotram ​ adc   #​1 ​           ; C = 0 from compare
 tsnoram ​  ​sta ​  ​numbanks,​y tsnoram ​  ​sta ​  ​numbanks,​y
           lsr   a           lsr   a
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           sta   ​data,​x ​       ; restore data           sta   ​data,​x ​       ; restore data
           pla                 ; get counter back, sets N and Z, net save 4 bytes over existing code           pla                 ; get counter back, sets N and Z, net save 4 bytes over existing code
 +          bcc   ​tsgotram ​     ; RAM found, extra branch net cost 2 bytes
           beq   ​tsnoram ​      ; still won't find lonely bank 0           beq   ​tsnoram ​      ; still won't find lonely bank 0
-          ​bcs   tsloop ​       ; loop until we find a bank +          ​bra   tsloop ​       ; loop until we find a bank 
-          adc   #​1 ​           ; C = 0 from compare, could also use inc a+tsgotram: ​adc   #​1 ​           ; C = 0 from compare, could also use inc a
 tsnoram: ​ sta   ​numbanks,​y tsnoram: ​ sta   ​numbanks,​y
           lsr   a           lsr   a
Line 118: Line 153:
  
 If it was undesirable to use the stack, we overwrite sizetemp anyway when the routine exits, so we could replace the pha/pla with sta sizetemp/​lda sizetemp at the cost of 4 bytes. If it was undesirable to use the stack, we overwrite sizetemp anyway when the routine exits, so we could replace the pha/pla with sta sizetemp/​lda sizetemp at the cost of 4 bytes.
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