This shows you the differences between two versions of the page.
Both sides previous revision Previous revision | Next revision Both sides next revision | ||
mg_notes:general:io_page [2019/07/31 17:32] M.G. |
mg_notes:general:io_page [2019/07/31 17:33] M.G. Z-Ram Ultra Clock |
||
---|---|---|---|
Line 135: | Line 135: | ||
| | CGGA_5F | P | WR | IIc+/Zip Chip: Paddle delay & Language Card cache | | | | CGGA_5F | P | WR | IIc+/Zip Chip: Paddle delay & Language Card cache | | ||
| | ZIPGS_5F | G | R | ZipGS: Read last tag and reset cshupd | | | | ZIPGS_5F | G | R | ZipGS: Read last tag and reset cshupd | | ||
- | | C060-C06F | OKI6242 | C | WR | AE Z-RAM Ultra Clock - OKI 6242 chip | | + | | C060-C06F | OKI6242 | C | WR | AE Z-RAM Ultra Clock - OKI 6242 chip (low 4 bits of each location) | |
| C060 49248 | TAPEIN | OE | R7 | Read Cassette Input (not on IIe PDS Card) | | | C060 49248 | TAPEIN | OE | R7 | Read Cassette Input (not on IIe PDS Card) | | ||
| | | C | R7 | Status of 80/40 Column Switch (not IIc Plus) | | | | | C | R7 | Status of 80/40 Column Switch (not IIc Plus) | |