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| Address | R/W | Use |
|---|---|---|
| $C028 | W | Switch to main firmware (undocumented). |
| $C029 | R/W | Switch to alt firmware bank (undocumented). |
| $C02B | R/W | Bit 2 = set CPU speed (1=fast).* Bit 3 = Set Alt FW Bank D1/D2 (undocumented). |
| $C05C | R | Bit 2 = speed selected in option panel (1=fast).* |
* See TN.AIIE.10.
The clock card has the following in it's I/O locations most times:
| Offset | Dir | Use |
|---|---|---|
| 00 | R/W | Firmware writes here, perhaps as a control register, the value written here is readable |
| 01 | R | Reading this location continuously returns the date and time in the ThunderClock format |
| 02 | ? | Unknown (always $FF?) |
| 03 | R | The firmware uses this location |
| 04-07 | R | Some kind of counter, seems to always be 7 more than the 08-0E value |
| 07 | R | A different counter value |
| 08-0E | R | Yet another counter value |
| 0F | R | And we have another counter |
Changing the date/time in the Macintosh control panel while the //e is running causes the 01 offset value to return continuous 8D (CR). The firmware is able to fix this, but I haven't figured out how, yet.
The characters out of the 01 offset are msb off, except for the CR value.