Differences
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mg_notes:iie_card:io_addresses [2017/08/10 17:48] M.G. [$C0xx Space] |
mg_notes:iie_card:io_addresses [2018/02/08 12:27] (current) M.G. [$C02B Bits] |
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| ====== LC //e Card - I/O Addresses ====== | ====== LC //e Card - I/O Addresses ====== | ||
| - | ===== $C0xx Space ===== | + | ===== $C000-$C07F ===== |
| + | |||
| + | Locations with undefined reads in the $C000-$C07F range tend to return the last key pressed. | ||
| ^ Address ^ R/W ^ Use ^ | ^ Address ^ R/W ^ Use ^ | ||
| - | | $C028 | W | Switch to main firmware (undocumented). | | + | | $C028 | R/W | Switch to main firmware (undocumented). | |
| | $C029 | R/W | Switch to alt firmware bank (undocumented). | | | $C029 | R/W | Switch to alt firmware bank (undocumented). | | ||
| - | | $C02B | R/W | See table below.* | | + | | $C02B | R/W | Bits in table below.* | |
| | $C05C | R | Bit 2 = speed selected in option panel (1=fast).* | | | $C05C | R | Bit 2 = speed selected in option panel (1=fast).* | | ||
| + | | $C072 | W | The firmware (Int CX ROM and PFI) write either $5A or $00 here.%%**%% | | ||
| %%*%% See [[http://www.1000bit.it/support/manuali/apple/technotes/aiie/tn.aiie.10.html|TN.AIIE.10]]. | %%*%% See [[http://www.1000bit.it/support/manuali/apple/technotes/aiie/tn.aiie.10.html|TN.AIIE.10]]. | ||
| + | |||
| + | %%**%% Writes to $C072: | ||
| + | |||
| + | ^ Who ^ Where ^ Value ^ | ||
| + | | INT CX | $C4AB | $00 | | ||
| + | | INT CX | $C579 | $5A | | ||
| + | | PFI 0 | $D445 | $5A | | ||
| + | | PFI 0 | $D470 | $00 | | ||
| + | | PFI 0 | $F5EF | $00 | | ||
| + | | PFI 0 | $F60B | $5A | | ||
| + | | PFI 1 | $D4BC | $5A | | ||
| + | | PFI 1 | $D519 | $00 | | ||
| + | | PFI 1 | $F178 | $5A | | ||
| + | | PFI 1 | $F205 | $00 | | ||
| + | |||
| + | |||
| ==== $C02B Bits ==== | ==== $C02B Bits ==== | ||
| ^ Bit ^ Use ^ | ^ Bit ^ Use ^ | ||
| - | | 7 | Unknown | | + | | 7 | Set in IRQINTCX | |
| - | | 6 | Cleared at $C41C in Int. CX ROM | | + | | 6 | Cleared at $C41C in Int. CX ROM, set at $C573 | |
| - | | 5 | Unknown | | + | | 5 | Enable writes to some areas of the $C8xx space? | |
| - | | 4 | Unknown | | + | | 4 | Enable a second aux RAM bank? | |
| | 3 | Set Alt FW Bank, 0=D1, 1=D2. | | | 3 | Set Alt FW Bank, 0=D1, 1=D2. | | ||
| | 2 | Set CPU speed (1=fast). Documented. | | | 2 | Set CPU speed (1=fast). Documented. | | ||
| - | | 1 | Unknown | | + | | 1 | 3.5%%"%% signal: HDSEL | |
| - | | 0 | Cleared at C41C in Int. CX ROM | | + | | 0 | 3.5%%"%% signal: /3.5DISK | |
| + | |||
| + | The PFI code always sets bits 4 and 5 after storing $5A into $C072, and always clears bits 4 and 5 after storing a zero into $C072. This appears to enable writing to $C8-space and to a second aux bank. | ||
| ===== Slots ===== | ===== Slots ===== | ||