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mg_notes:iie_card:io_addresses [2017/08/23 00:00] M.G. [$C02B Bits] |
mg_notes:iie_card:io_addresses [2018/02/08 12:27] (current) M.G. [$C02B Bits] |
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| 7 | Set in IRQINTCX | | | 7 | Set in IRQINTCX | | ||
| 6 | Cleared at $C41C in Int. CX ROM, set at $C573 | | | 6 | Cleared at $C41C in Int. CX ROM, set at $C573 | | ||
- | | 5 | See below | | + | | 5 | Enable writes to some areas of the $C8xx space? | |
- | | 4 | See below | | + | | 4 | Enable a second aux RAM bank? | |
| 3 | Set Alt FW Bank, 0=D1, 1=D2. | | | 3 | Set Alt FW Bank, 0=D1, 1=D2. | | ||
| 2 | Set CPU speed (1=fast). Documented. | | | 2 | Set CPU speed (1=fast). Documented. | | ||
- | | 1 | 3.5%%"%% signals on disk port | | + | | 1 | 3.5%%"%% signal: HDSEL | |
- | | 0 | 3.5%%"%% signals on disk port | | + | | 0 | 3.5%%"%% signal: /3.5DISK | |
- | The PFI code always sets bits 4 and 5 after storing $5A into $C072, and always clears bits 4 and 5 after storing a zero into $C072. This appears to enable writing to $C8-space. | + | The PFI code always sets bits 4 and 5 after storing $5A into $C072, and always clears bits 4 and 5 after storing a zero into $C072. This appears to enable writing to $C8-space and to a second aux bank. |